Yidnek Mekonnen

Department of Electrical and Computer Engineering
Univesity of Illinois at Urbana-Champaign
371B William L. Everitt Laboratory
1406 W. Green Street
Urbana, IL 61801-2918
Phone:- (217)-244-6949
Email: mekonnen@uiuc.edu
 

 

Last updated: Oct 2006

I am a Ph.D. candidate in the Department of Electrical and Computer Engineering at university of Illinois, Urbana-Champaign. I am working in Center for Computational Electromagnetics and Electromagnetics Laboratory under Prof. José E. Schutt-Ainé.

Education:

  • Ph.D., Electrical Engineering, University of Illinois at Urbana-Champaign, Fall 2004 - Present.
  • M.S., Electrical Engineering, University of Illinois at Urbana-Champaign, Fall 2002 - Summer 2004.
  • B.S., Electrical and Computer Engineering , Addis Ababa University, Ethiopia, Fall 1995 - Spring 2000.

Research Area:

  • Passive Maromodel Generation of High-Speed Interconnects and Packages
  • As operating frequencies increase and device sizes decrease, the complexity of modern circuits are putting enormous pressure on computer aided design tools. In the VLSI area, interconnect effects such as signal delay, cross-talk, ringing, reflections and distortion can severely affect the signal integrity of the designs. Consequently, circuit designers must consider interconnect analysis to ensure circuit performance and reliability. The main purpose of this work is to approximate a frequency dependent date either from measurement or from full wave analysis of an element or a structure. Using the vector fitting method, an analytical equation which governs the system behavior with a wide range of dynamic frequency achieved using simple first order differential equation. The vector fitting method depends on the selection of good starting pole for the approximation and the accuracy also depends on this initial poles. To alleviate this problem, a rational interpolation method is used prior to using the vector fitting method. The interpolation method gives a better initial guess to the vector fitting method. Using the combination of the two methods, an accurate, a stable and a robust methodology is achieved. This combined method does not depend on the type of the approximation date. The method works for S, Y, Z or any parameter data, which is independent of parameter type. This allows flexibility to the user. One of the major achievements of this combined method is its convergence. No matter what the type of data is, the method always reaches its optimal solution. The method is a least square approximation technique based on pole-zero relocation technique. The method does not suffer from numerical problem when approximating high-order system over a wide frequency range. The physical behavior of the interconnect such as stability, causality and passivity of the macromodel is also preserved. In addition, the algorithm can be used to perform statistical analysis of interconnect.

  • Statistical analysis of on-chip interconnects

As technology scales, understanding semiconductor manufacturing variation becomes essential to effectively design high performance circuits. Process variation is a key concern for manufacturability, process control, and circuit design. Knowledge of process variation is important to optimize critical path delay, minimize clock skew, and reduce crosstalk noise. If process variation is not well understood, unnecessarily large design margins must be put in place to ensure that desired circuit performance specifications are met. In this project, the dual damascene BEOL process is used to analyze and quantify the impact of process tolerances related to the deposition, etching, polishing, and other manufacturing operations on the variability of capacitance of the on-chip wire.

Research Interest: Advisor : Prof. José E Schutt-Ainé

  • Signal integrity analysis of high-speed interconnects and package.
  • Efficient circuit simulation techniques and model order reduction methods.
  • High-Speed digital and RFIC circuit design, simulation and verification.
  • Statistical analysis of interconnects.
  • Digital Signal Processing

 

Publications:

  • Y.S. Mekonnen, J.E. Schutt-Aine, Jilin Tan, C. Kumar, Dragoslav Milosevic, "Combining Rational Interpolation with the vector-fitting method," Proceedings of IEEE 14th Topical Meeting on Electrical Performance of Electrical Packaging, pp 51-54, Oct 24-26,2005.
  • R. Gao, Y. S. Mekonnen, W. T. Beyene and J. E. Schutt-Aine, "Black-Box Modeling of Passive systems by Rational Function Approximation," IEEE Transaction on Advanced Packaging, Vol. 28,Issue 2, pp 209-215, May 2005.
  • Y. S. Mekonnen, W. T. Beyene and J. E. Schutt-Aine, "Improved High-Order Approximation by Combining Rational Interpolation with the Vector Fitting method," 20th Annual Review of Progress in Applied Computational Electromagnetic, Syracuse, NY, April 19-23,2004.
  • R.Gao, Y.S.Mekonnen, W.T.Beyene and J.E.Schutt-Aine, "Black-Box Modeling by Rational Function Approximation," Proceedings of 8th IEEE Workshop on Signal Propagation oin Interconnects,Heidelberg,Germany, May 9-12,2004.

Patent:

  • Abe Elfadel, Y.S. Mekonnen, M.S. Angyal, Alina Deutsch, "Computer-Aided Method and Tool for the Statistical Analysis of Interconnect Using Manufacturing Process Data," Disclosure No YOR820060647, August 2006.(Filed by IBM).